1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor optical element having an electrode formed on the top of a waveguide ridge and, more particularly, to a semiconductor optical element manufacturing method capable of preventing a reduction in the area of contact between a semiconductor layer and an electrode on the waveguide ridge top by means of a simple process, and preventing the semiconductor layer on the waveguide ridge top from being damaged by etching.
2. Background Art
In recent years, research and development of nitride-based semiconductor lasers using nitride-based III-V-group compound semiconductors such as AlGaInN as semiconductor lasers capable of light emission in the blue region to ultraviolet region necessary for increasing the density of optical disks have been aggressively conducted, and such semiconductor lasers have been put to practical use.
Such a blue-violet LD (a laser diode abbreviated as LD hereinafter) is formed by crystal-growing a compound semiconductor on a GaN substrate. The compound semiconductor is typically a III-V-group compound semiconductor in which a III-group element and a V-group element are combined. Mixed-crystal compound semiconductors are obtained by combining III-group atoms and V-group atoms in various composition ratios. Compound semiconductors used for blue-violet LDs are, for example, GaN, GaPN, GaNAs, InGaN and AlGaN.
In a waveguide-ridge-type LD, a waveguide ridge is covered with an insulating film. An opening is provided in the insulating film at the top of the waveguide ridge. Through this opening, an electrode is connected to a contact layer which is the uppermost layer of the waveguide ridge.
The opening in the insulating film is formed by a lift-off method using a resist mask used at the time of forming the waveguide ridge. This resist mask is recessed along the surface of the contact layer. Therefore, part of the insulating film remains in the recess even after lift-off. There is a problem that the area of contact through which the electrode contacts the contact layer is reduced relative to the entire surface area of the contact layer at the waveguide ridge top by the residual insulating film.
In a red LD, GaAs or the like having a comparatively low contact resistance is used as the material of a contact layer and, therefore, the contact resistance with an electrode is not largely increased even if the contact area is reduced. In a blue-violet LD, however, GaN or the like having a comparatively high contact resistance is used as the material of a contact layer and, therefore, the contact resistance with an electrode is largely increased with reduction in contact area, resulting in increase in operating voltage.
To solve this problem, a method described below has been proposed. First, an electrode is formed on a semiconductor multilayer structure. Next, a resist is formed on the electrode, the electrode is etched, and the semiconductor multilayer structure is etched to an intermediate position therein to form a waveguide ridge. Next, an insulating film is formed on the wafer upper surface while the resist is left. The resist is then removed to expose the upper surface of the waveguide ridge. A p-type pad electrode is thereafter formed so as to cover the electrode (see, for example, lines 42 to 50 on page 9 and FIG. 1 of WO2003/085790).
A method described below has also been proposed. First, a portion of a semiconductor multilayer structure is etched to form a waveguide ridge. Next, an insulating film is formed on the surface of the waveguide ridge. Next, a lower-layer resist and an upper-layer resist are successively formed on the insulating film. A resist which reacts only with light having a wavelength shorter than 300 nm is used as the lower-layer resist, and a resist which reacts only with light having a wavelength equal to or longer than 300 nm is used as the upper-layer resist. The upper-layer resist is patterned so that the lower-layer resist in the vicinity of the waveguide ridge is exposed. The lower-layer resist is then patterned so that the insulating film on the waveguide ridge is exposed. Etching is thereafter performed to remove the insulating film on opposite sides of the waveguide ridge. The remaining lower-layer resist and upper-layer resist are then removed and a metal layer is deposited as an electrode (see, for example, paragraphs 0024 to 0034 and FIGS. 7 to 18 of Japanese Patent Laid-Open No. 2000-22261).
A method described below has also been proposed. First, a contact layer is etched by using a metal mask. Next, a semiconductor multilayer structure is etched to form a waveguide ridge, with the contact layer used as a mask, while the metal mask is left. Next, an insulating film is formed on the entire surface, and the metal mask and the insulating film formed on the metal mask are removed by lift-off. Next, a resist through which a p-side electrode is exposed is formed by lithography. An electrode material is vacuum-deposited by using this resist as a mask. The resist and the electrode material on the resist are then removed by lift-off, thereby forming an electrode which contacts the contact layer of the waveguide ridge (see, for example, paragraphs 0025 to 0034 and FIG. 1 of Japanese Patent Laid-Open No. 2000-340880).
A method described below has also been proposed. First, a first protective film is formed on a contact layer and a second protective film in stripe form is formed on the first protective film. Next, the first protective film is etched while maintaining the second protective film, and the second protective film is thereafter removed, thereby forming the first protective film in stripe form. Next, the semiconductor multilayer structure is etched to an intermediate position therein by using the first protective film as a mask, thereby forming a waveguide ridge. Next, a third protective film of an insulating material different from the first protective film is formed on the side surfaces of the waveguide ridge and on the flat surface of the semiconductor layer exposed by etching. Only the first protective film is thereafter removed by lift-off and an electrode electrically connected to the contact layer is formed on the third protective film and the contact layer (see, for example, paragraphs 0020 to 0027 and FIG. 1 of Japanese Patent Laid-Open No. 2003-142769).
A reduction in the area of contact between the contact layer of the waveguide ridge and the electrode can be prevented by each of these methods. However, each method includes a complicated step, such as the step of simultaneously etching a metal electrode and a semiconductor layer, the step in which when resists in two layers are used, etching of the upper-layer resist is stopped while leaving the lower-layer resist, the step of using a metal mask, or the step of performing lift-off when a plurality of protective films are used. Therefore, devices uniform in characteristics cannot be steadily manufactured by any of the above-described methods, and the degree of process freedom has been low.
To prevent a reduction in the area of contact between a contact layer of a waveguide ridge and an electrode while using a simple process, a method described below has been proposed. First, channels are formed in a wafer having semiconductor layers stacked, thereby forming a waveguide ridge. Next, SiO2 film is formed on the entire wafer surface. Next, a resist is formed so that the film thickness is larger in the channels than at the waveguide ridge top. The resist on the top of the waveguide ridge is then removed by dry etching while leaving the resist in the channels. Next, the SiO2 film formed on the top of the waveguide ridge is reliably removed by performing etching using the resist as a mask, while leaving the SiO2 film formed on the side surfaces and bottoms of the channels. The resist is thereafter removed and an electrode is formed on the top of the waveguide ridge.
A method described below has also been proposed. First, a metal layer in stripe form is formed on the upper surface of a p-type contact layer. Next, a p-side ohmic electrode is formed by performing a heat treatment (alloying). Next, etching is performed by using the p-side ohmic electrode as a mask and using Cl2 as etching gas until the p-type guide layer is exposed (see, for example, paragraphs 0035 to 0038 and FIG. 2 of Japanese Patent Laid-Open No. 2004-253545).
A method described below has also been proposed. First, a first protective film formed of a Silicon oxide is formed on the entire surface of a p-side contact layer and a third protective film in stripe form is formed on the first protective film. Next, the first protective film is etched while maintaining the third protective film, and the third protective film is thereafter removed, thereby forming the first protective film in stripe form. Next, the p-side contact layer is etched from portions on which the first protective film is not formed, thereby forming a waveguide region in stripe form immediately below the first protective film in conformity with the shape of the protective film. Next, a second protective film of an insulating material different from the first protective film is formed on the side surfaces of the waveguide in stripe form, on the flat surface of a nitride semiconductor layer (p-side clad layer) exposed by etching and on the first protective film. The first protective film is thereafter removed by dry etching using fluoric acid for example. Only the second protective film formed on the first protective film is thereby removed, while the second protective film is continuously formed on the side surfaces of the stripe and on the flat surface of the p-side clad layer (see, for example, paragraphs 0018 to 0024 and FIG. 6 of Japanese Patent Laid-Open No. 2000-114664).
A method described below has also been proposed. First, an epitaxially grown layer of a GaN-based material is formed on a sapphire substrate, and a first mask (SiO2 film) in stripe form is formed on a p-GaN contact layer formed as the uppermost layer. Next, dry etching is performed by using the first mask as a mask to form a waveguide ridge stripe. Next, an AlGaN buried layer is nonselectively formed on opposite sides of the waveguide ridge stripe and on the first mask, a second mask (SiO2 film) is formed on the AlGaN buried layer, and a resist is formed by spin coating. This resist has a reduced thickness portion corresponding to the SiO2 film on the top of the waveguide ridge stripe relative to the opposite sides of the waveguide ridge stripe. Next, the resist of the portion corresponding to the waveguide ridge stripe portion is removed by dry etching using oxygen gas for example, thereby exposing the second mask. The exposed second mask is selectively etched by using CF4 to expose the AlGaN buried layer. Next, the remaining resist is removed by ashing to expose the second mask. Wet etching is performed by using this second mask as a mask to remove the AlGaN buried layer, thereby exposing the first mask on the waveguide ridge top. Next, the first mask and the second mask are removed by wet etching (see, for example, paragraphs 0030 to 0040 and FIGS. 2 to 12 of Japanese Patent Laid-Open No. 2000-164987).
A method described below has also been proposed. First, a GaN-based multilayer structure is formed on a sapphire substrate by MOCVD or the like. Next, an electrode in stripe form is formed on a contact layer in this multilayer structure. Next, a waveguide ridge is formed by using the electrode as a mask. Next, an insulating layer is formed on opposite sides of the waveguide ridge and so as to cover the opposite side surfaces of a clad layer included in the waveguide ridge and lower portions of the opposite side surfaces of a contact layer. A resist is then applied on the insulating layer. This resist is formed so as to have a reduced thickness on the waveguide ridge and an increased thickness on the opposite sides of the waveguide ridge and have top surfaces substantially flush with each other. Next, the top surface and opposite side surfaces of the electrode and upper portions of the opposite side surfaces of the contact layer are exposed by etching, and a metal film in stripe form having the same width as that of the mesa structure is formed (see, for example, paragraphs 0064 to 0073 and FIGS. 3 to 6 of Japanese Patent Laid-Open No. 2002-335043).